RMII Interface
Basically, in RMII, total 11 signals. (Look for pins of RMII mode, not MII mode in the Reference Manual) Transmit side TXD0, TXD1, TXEN, TXER.
Receive side RXD0, RXD1, RXEN(RX_CRS_DV, RXER). Two signals MDIO and MDC. One common Reference clock for Transmit, Receive and PHY that is called ENET_REF_CLK. (Remember there is no separate TX_CLK or RX_CLK). So, you have to configure the Tx/Rx/MDIO/MDC pins and make sure the REF_CLK signal from the Ethernet module to be output to the PHY.
In iMX6, this Reference clock is taken from "TX_CLK" pin which is not used in RMII mode. So, you have to configure this pin as ENET_REF_CLK, not TX_CLK. Whether this signal is got from outside Oscillator or inside PLL also can be selected. Also, output driver needs to be selected for this Pin.
Basically, in RMII, total 11 signals. (Look for pins of RMII mode, not MII mode in the Reference Manual) Transmit side TXD0, TXD1, TXEN, TXER.
Receive side RXD0, RXD1, RXEN(RX_CRS_DV, RXER). Two signals MDIO and MDC. One common Reference clock for Transmit, Receive and PHY that is called ENET_REF_CLK. (Remember there is no separate TX_CLK or RX_CLK). So, you have to configure the Tx/Rx/MDIO/MDC pins and make sure the REF_CLK signal from the Ethernet module to be output to the PHY.
In iMX6, this Reference clock is taken from "TX_CLK" pin which is not used in RMII mode. So, you have to configure this pin as ENET_REF_CLK, not TX_CLK. Whether this signal is got from outside Oscillator or inside PLL also can be selected. Also, output driver needs to be selected for this Pin.
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