JTAG connector

http://www.kmckk.co.jp/jet2/probe-manual-img/jet2_arm20toCTX.pdf

ARM interrupt handling

https://ece.umd.edu/class/enee447.S2016/ARM-Documentation/ARM-Interrupts-1.pdf

Autosar

http://www.rroij.com/open-access/an-overview-of-autosar-multicore-operating-system-implementation-.php?aid=46277

Using Power Bank/Pack to power the boards

Powering arduino UNO+microservo off power bank

https://electronics.stackexchange.com/questions/286535/powering-arduino-unomicroservo-off-power-bank

How can I signal a USB charger to provide power?

https://electronics.stackexchange.com/questions/391444/how-can-i-signal-a-usb-charger-to-provide-power

Powering Arduino from a power bank (Read 23762 times)

https://forum.arduino.cc/index.php?topic=305175.0

TalentCell Rechargeable 12V 6000mAh/5V 12000mAh

https://www.amazon.com/gp/product/B00ME3ZH7C/ref=oh_aui_detailpage_o09_s00?ie=UTF8&psc=1

TalentCell Rechargeable 12V 6000mAh/5V 12000mAh DC Output Lithium Ion Battery Pack For LED Strip And CCTV Camera Portable Li-ion Battery Bank With Charger Black (Multi-led indicator)

https://www.amazon.in/TalentCell-Rechargeable-12000mAh-Multi-led-indicator/dp/B00ME3ZH7C

MCIMX6DL-SDP

https://www.components-center.com/jp/product/NXP-USA-Inc/MCIMX6DL-SDP.html

Porting MII to RMII

When RMII is added check the following:

1) CPU should have the selector bit to choose between MII and RMII. Make sure the RMII mode is selected.

2) In RMII, the MAC should be configured for Speed (10/100) and Duplex manually. Please check whether the code configures it correctly. MII may require only the Duplex to be set manually.

3) In same way as of 1), if the PHY supports both MII/RMII, the PHY should be configured for RMII. And, also check for additional settings for RMII.

4) In RMII, the 50MHz Reference clock needs to be supplied. Please check that clock supply has been enabled.

5) Finally, the GPIO settings that is subset of MII.

Rene

r_cpg_lld_rza2m.c

/*! EXTAL frequency (khz) */
static double_t gs_cpg_extal_frequency_khz = 24000.0;
/*! PLL frequency (khz) */
static double_t gs_cpg_pll_frequency_khz = 1056000.0;
/*! ICLK divisor */
static uint32_t gs_cpg_iclk_divisor = 2;
/*! ICLK frequency (khz) */
static double_t gs_cpg_iclk_frequency_khz = 528000.0;
/*! BCLK divisor */
static uint32_t gs_cpg_bclk_divisor = 8;
/*! BCLK frequency (khz) */
static double_t gs_cpg_bclk_frequency_khz = 132000.0;
/*! P1CLK divisor */
static uint32_t gs_cpg_p1clk_divisor = 16;
/*! P1CLK frequency (khz) */
static double_t gs_cpg_p1clk_frequency_khz = 66000.0;