ZC-702

Documentation


http://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html#documentation

EWARM STACK placement and linker defined symbols

Are We Shooting Ourselves in the Foot with Stack Overflow?

http://embeddedgurus.com/state-space/2014/02/are-we-shooting-ourselves-in-the-foot-with-stack-overflow/

Vectorization

http://www.doulos.com/knowhow/arm/using_your_c_compiler_to_exploit_neon/Resources/using_your_c_compiler_to_exploit_neon.pdf


Using IAR Embedded Workbench for ARM compiler vectorization ..
https://www.iar.com/support/resources/articles/automatic-neon-vectorization/




https://www.google.co.jp/?gfe_rd=cr&ei=Tv7wVqHIGKzU8Afv0oHADg#q=gcc+howto+use+pragma+to+disable+vectorization
(How to user pragma to disable vectorization)
http://stackoverflow.com/questions/7778174/how-can-i-disable-vectorization-while-using-gcc


C:\Program Files (x86)\KPIT\GNUARM-NONEv15.01-EABI\Doc\optimization_in_GCC.html


For ARM CC


http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0472j/chr1359124210006.html


List of options - Keil
http://www.keil.com/support/man/docs/armcc/armcc_chr1359124992544.htm


http://www.slideshare.net/linaroorg/using-gcc-autovectorizer


novector GCC
http://www.isus.jp/article/compileroptimization/compiler_part6/


Branch Prediction - Cortex-A initialization

https://chromium.googlesource.com/native_client/nacl-newlib/+/99fc6c167467b41466ec90e8260e9c49cbe3d13c/libgloss/arm/cpu-init/rdimon-aem.S

ARM ADS

--list

This option instructs the compiler to generate raw listing information for a source file. The name of the raw listing file defaults to the name of the input file with the filename extension .lst.


http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/CHDDIBFD.html




GENMAI sample


http://japan.renesas.com/products/mpumcu/rz/rza/rza1h/Application_Notes.jsp




LDR (PC relative)
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Babcjaii.html
http://www.sciencezero.org/index.php?title=ARM:_Cortex-M3_Thumb-2_instruction_set


Section placement and Scatter loading in ARM
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065968963.htm


Load$$LR$$ load region symbols
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065953823.htm




Loading linker symbol


http://infocenter.arm.com/help/topic/com.arm.doc.dui0474l/DUI0474L_armlink_user_guide.pdf
32-bit applications
Create a 32-bit data word to hold the value of the symbol, for example:
IMPORT |Image$$ZI$$Limit|
…
zi_limit DCD |Image$$ZI$$Limit|
To load the value into a register, such as r1, use the LDR instruction:
LDR r1, zi_limit
The LDR instruction must be able to reach the 32-bit data word. The accessible memory range varies
between ARM and Thumb, and the architecture you are using.

Mulitcore iTRON: Concept collection

http://www.noble-library.org/papers.html



http://pubman.mpdl.mpg.de/pubman/item/escidoc:1819096:3/component/escidoc:1840714/MPI-I-2007-1-003.p

What is Lock-Free?


Like your Futex implementation, just use Hardware atomic operations to check availability of access and atomically lock the resources. But, when there is failure on checking the availability, still it returns with FALSE. It does not block.



What is Wait-Free?


Hard real time systems requires this. Waiting also limited and guranteed.


Lock-free vs. wait-free concurrency




http://rethinkdb.com/blog/lock-free-vs-wait-free-concurrency/


The lockless page cache patches to the Linux kernel are an example of a wait-free system.
The lockless page cache
http://lwn.net/Articles/291826/
http://www.barrelfish.org/peter-phd-multicore-resource-mgmt.pdf




http://users.ece.utexas.edu/~valvano/EE345M/Arm_EE382N_4.pdf

Read

http://www.embedded.com/design/mcus-processors-and-socs/4007148/Building-Bare-Metal-ARM-Systems-with-GNU-Part-7


Interwork


https://wiki.ubuntu.com/ARM/Thumb2PortingHowto
https://answers.launchpad.net/gcc-arm-embedded/+question/231518


Softfp and Hard ABI


https://bugs.chromium.org/p/v8/issues/detail?id=2140

Undefined Reference

(.text.get_num_and_scan+0x20): undefined reference to `isdigit'


http://renesasrulz.com/renesas_forum_home/rl78/f/26/t/5069.aspx


Clear BSS section in ARM


http://www.keil.com/support/docs/2821.htm