SSH Testing using WolfSSL

1) Download WolfSSH and WolfSSL from Download page of WolfSSL homepage. Just user information is given and download was possible.

2) Place WolfSSL and WolfSSH in the same parent directory as mentioned in the ReadMe of IDE\Win folder and copy the user_settings.h to WolfSSL.

3) Build WolfSSL Library by selecting “wolfssl64.sln” from the root directory of WolfSSL in Visual Studio.

4) Then build the WolfSSH from IDE\WIN.

5) Then execute the Echoserver and Client programs. User name and password is in the server source file.

RFCs:
https://www.ssh.com/ssh/protocol/

https://www.samtec.com/jp/standards/jtag

JTAG 20 pin dimensions

ARM Standard JTAG Connector (20-pins, 0.10")

The header (e.g. a Samtec TST-110-01-L-D) is a 20-Pin, 0.10" (2.54 mm) pitch connector with these these dimensions: 1.3" x 0.365" (33 mm x 9.27mm).

https://www.digikey.com/product-detail/en/samtec-inc/TST-110-01-L-D/SAM10837-ND/2685837
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FTSH-110-01-L-DV-K

It's dimensions are: 0.50" x 0.188" (12.70mm x 4.78mm).


https://www.samtec.com/products/ftsh-110-01-l-dv-k

Connectors

http://www.keil.com/support/man/docs/jlink/jLink_connectors.htm

What's the difference between versions 1 and 2 of the SSH protocol?

http://www.snailbook.com/faq/ssh-1-vs-2.auto.html

PIC32 microAptive core

https://www.mips.com/products/aptiv/microaptiv/

First follow up microAptive UP core which has MMU.

Poring Features:

CPU operating modes: 

the operating modes (kernel, user, and debug). This is controlled by System Control Coprocessor (CP0).

Howto switch between the modes?

5.8.17 Execution Exception — System Call
The system call exception is one of the execution exceptions. All of these exceptions have the same priority. A system
call exception occurs when a SYSCALL instruction is executed.
Cause Register ExcCode Value:
Sys
Additional State Saved:
None
Entry Vector Used:
General exception vector (offset 0x180)

Table 6.28 Cause Register ExcCode Field
Exception Code Value
8 16#08 Sys Syscall exception


http://www.it.uu.se/education/course/homepage/os/vt18/module-1/assignment/
When an exception or interrupt occurs, the address of the program counter of the currently executing program is automatically saved to the EPC register in coprocessor 0 and control is transferred from user mode to kernel mode.

https://github.com/uu-os-2018/module-1

Exceptions. Any supervisor calls?

Yes. Syscall instruction is available.

Volatile and Non-volatile registers

https://courses.cs.washington.edu/courses/cse410/09sp/examples/MIPSCallingConventionsSummary.pdf

R0~R31 registers. Specified as $0~$31

Volatile:
R0 → Always 0. ($0)
R1 → $at → Assembler Temporary ($at )
R2, R3 → Volatile. Return value ($v0-$v1)
R4~R7 → Volatile. Arguments ($a0-$a3)
R8~R15, R24, R25 →  The Temporary Registers.Volatile. ($t0-$t9)
R26-R27 →The Kernel Reserved registers. DO NOT USE. ($k0-$k1)

Non-Volatile:
R16~R23 → Non-volatile. Saved Registers. ($s0-$s7)
R28 → Globals Pointer ($gp)
R29 → Stack Pointer ($sp)

R30 → Frame pointer ($fp or $s8)
R31 → Holds the return address for a function call.

Instructions are like ARM only.

stack frame is always a multiple of 8.

MIPS Instruction Set Quick Reference:
https://www2.cs.duke.edu/courses/fall13/compsci250/MIPS32_QRC.pdf

PIC32MZ DA

PIC32MZ2064DAA176
https://www.microchip.com/wwwproducts/en/PIC32MZ2064DAA176

Features:

• 200 MHz/330 DMIPS, MIPS32 microAptiv core
• Dual Panel Flash for live update support
• 12-bit, 18 MSPS, 45-channel ADC module
• Memory Management Unit for optimum embedded OS execution
• microMIPS mode for up to 35% code compression
• CAN, UART, I2C, PMP, EBI, SQI & Analog Comparators

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Part Family

PIC32MZDA

Max CPU Speed MHz

200

Program Memory Size (KB)

2048

SRAM (KB)

640

SDIO/SD-CARD/eMMC

1

Temperature Range (C)

-40 to 85

Operating Voltage Range (V)

2.2 to 3.6

Graphics Controller/GPU

Yes

Direct Memory Access Channels

8

SPI

6

I2C

5

CODEC Interface (I2S,AC97)

Yes

Peripheral Pin Select / Pin Muxing

Yes

CTMU test

Yes

Ethernet

10/100 Base-TX Mac

Number of Ethernet Ports

1

Number of USB Modules

1

USB Interface

High Speed

Number of CAN modules

2

Type of CAN module

CAN

ADC Input

45

Max ADC Resolution (Bits)

12

Max ADC Sampling Rate (ksps)

18000

Input Capture

9

Standalone Output Compare/Standard PWM

9

Max 16-bit Digital Timers

9

Parallel Port

PMP

Number of Comparators

2

Internal Oscillator

8 MHz, 32 KHz

Hardware RTCC/RTC

Yes

Max I/O Pins

120

Pincount

176

Serial Quad Interface

Ye

Creating a "Hello World" Application Using the MPLAB Harmony Configurator (MHC)

http://ww1.microchip.com/downloads/en/DeviceDoc/90003177A.pdf

Summary

Consider using the PIC32MZ2064DAK176 for new designs.

PIC32MZ DA series offers MPU like performance with ease of design of an MCU for GUI designs with it’s 2MB Flash and 640KB of SRAM, available on-chip 32MB or 128MB externally addressable DDR2 DRAM, integrated Graphics Controller, Graphics Processor, 200 MHz speed, 12-bit 18 MSPS ADC module with up to 45 analog inputs, CAN and HS USB.

Please consider this device PIC32MZ2064DAK176

Additional Features

Key Features
• 200 MHz/330 DMIPS, MIPS32 microAptiv core
• Dual Panel Flash for live update support
• 12-bit, 18 MSPS, 45-channel ADC module
• Memory Management Unit for optimum embedded OS execution
• microMIPS mode for up to 35% code compression
• CAN, UART, I2C, PMP, EBI, SQI & Analog Comparators
• SPI/I2S interfaces for audio processing and playback
• Hi-Speed USB Device/Host/OTG
• 10/100 Mbps Ethernet MAC with MII and RMII interface
• Advanced Memory Protection
  • Peripheral and memory region access control
• Temperature Range - 40°C to 85°C, - 40°C to 105°C (planned)
Microcontroller Features
• Operating voltage range of 2.3V to 3.6V
• 2MB Flash memory (plus an additional 160 KB of Boot Flash)
• 640KB SRAM memory
• microMIPS mode for up to 35% smaller code size
• DSP-enhanced core:
  • Four 64-bit accumulators
  • Single-cylce MAC, saturating and fractional math
  • IEEE 754-compliant
• Code-efficient (C and Assembly) architecture
Power Management
• Various power management options for extreme power reduction (VBAT, Deep Sleep, Sleep and Idle)
• Deep Sleep current: < 1µA (typical)
• Integrated POR and BOR
• Programmable High/Low-Voltage Detect (HLVD) on VDDIO and High-Voltage Detect (HVD) on VDDR1V8
Clock Management
• Programmable PLLs and oscillator clock sources
• Dedicated PLL for DDR2
• Fail-Safe Clock Monitor
• Independent Watchdog and Deadman Timers
• Fast wake-up and start-up
Peripheral Features
• 50 MHz SD/SDIO/eMMC bus interface
• 50 MHz External Bus Interface (EBI)
• 80 MHz Serial Quad Interface (SQI)
• Peripheral Pin Select (PPS) functionality to enable function remap
• Up to 8 channels of hardware DMA with automatic data size detection
• Six UART modules (25 Mbps): Supports LIN 1.2 and IrDA protocols
• Two CAN modules 2.0B Active with DeviceNet addressing support
• Six 4-wire SPI modules (80 Mbps)
• SQI configurable as an additional SPI module (50 MHz)
• Five I2C modules (up to 1 Mbaud) with SMBus support
• Parallel Master Port (PMP)
• Hardware Real-Time Clock and Calendar (RTCC) module
• Nine 16-bit Timers/Counters (four 16-bit pairs combine to create four 32-bit timers)
• Nine Input Capture (IC) and Nine Output Compare(OC)/PWM outputs
    Graphics Features
• 3-layer Graphics Controller with up to 24-bit color support
• High-performance 2D Graphics Processing Unit (GPU)
Audio Features
• Audio data communication: I2S, LJ, RJ, USB
• Audio data control interface: SPI and I2C™
• Audio data master clock: Fractional clock frequencies with USB synchronization
Advanced Analog Features
• 12-bit ADC Module:
• 18Msps rate with six Sample and Hold (S&H) circuits (five dedicated and one shared)
• Up to 45 analog inputs
• Can operate during sleep and idle modes
• Multiple trigger sources
• Six digital comparators and six digital filters
• Two comparators with 32 programmable voltage references
• Temperature sensor with ±2°C accuracy
• Charge Time Measurement Unit (CTMU)
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40oC to +105oC) (Planned)
• Class B Safety Library, IEC 60730
• Back-up internal oscillator
Debugger Development Support
• In-circuit and in-application programming
• 4-wire MIPS® Enhanced JTAG interface
• Unlimited program and 12 complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Non-intrusive hardware-based instruction trace
Integrated Software Libraries and Tools
• MPLAB Harmony – PIC32 software development framework
• C/C++ compiler with native DSP/fractional and FPU support
• TCP/IP, USB, Graphics, and mTouch middleware
• MFi, Android, and Bluetooth audio frameworks
• RTOS Kernels, Express Logic ThreadX FreeRTOS, OPENRTOS, Micriµm, µC/OS and SEGGER embOS

Research Papers

https://www.researchgate.net/publication/331460321_Energy-Efficient_Intra-Task_DVFS_Scheduling_Using_Linear_Programming_Formulation/download