Tuesday, September 18, 2018

Hook routines

When hook routines are enabled, after one hook function call, the execution went to invalid address locations. When the it is disabled, the program works fine. When I changed to SVC mode, then also it was working fine. When analyzing, the stack used was the previous task's stack pointer.

So, when checking a function call, not only check whether the registers are properly saved and returned. But, also check the stack used is not corrupting others. Even when checking a function, check once with changing the stack pointer.

JTAG connector

ARM interrupt handling

Autosar

Tuesday, September 11, 2018

Using Power Bank/Pack to power the boards

Powering arduino UNO+microservo off power bank

https://electronics.stackexchange.com/questions/286535/powering-arduino-unomicroservo-off-power-bank

How can I signal a USB charger to provide power?

https://electronics.stackexchange.com/questions/391444/how-can-i-signal-a-usb-charger-to-provide-power

Powering Arduino from a power bank (Read 23762 times)

https://forum.arduino.cc/index.php?topic=305175.0


TalentCell Rechargeable 12V 6000mAh/5V 12000mAh



TalentCell Rechargeable 12V 6000mAh/5V 12000mAh DC Output Lithium Ion Battery Pack For LED Strip And CCTV Camera Portable Li-ion Battery Bank With Charger Black (Multi-led indicator)

MCIMX6DL-SDP

Sunday, September 9, 2018

Porting MII to RMII

When RMII is added check the following:

1) CPU should have the selector bit to choose between MII and RMII. Make sure the RMII mode is selected.

2) In RMII, the MAC should be configured for Speed (10/100) and Duplex manually. Please check whether the code configures it correctly. MII may require only the Duplex to be set manually.

3) In same way as of 1), if the PHY supports both MII/RMII, the PHY should be configured for RMII. And, also check for additional settings for RMII.

4) In RMII, the 50MHz Reference clock needs to be supplied. Please check that clock supply has been enabled.

5) Finally, the GPIO settings that is subset of MII.

Wednesday, September 5, 2018

Rene

r_cpg_lld_rza2m.c

/*! EXTAL frequency (khz) */
static double_t gs_cpg_extal_frequency_khz = 24000.0;
/*! PLL frequency (khz) */
static double_t gs_cpg_pll_frequency_khz = 1056000.0;
/*! ICLK divisor */
static uint32_t gs_cpg_iclk_divisor = 2;
/*! ICLK frequency (khz) */
static double_t gs_cpg_iclk_frequency_khz = 528000.0;
/*! BCLK divisor */
static uint32_t gs_cpg_bclk_divisor = 8;
/*! BCLK frequency (khz) */
static double_t gs_cpg_bclk_frequency_khz = 132000.0;
/*! P1CLK divisor */
static uint32_t gs_cpg_p1clk_divisor = 16;
/*! P1CLK frequency (khz) */
static double_t gs_cpg_p1clk_frequency_khz = 66000.0;