ARM compiler: VFP compilation

>armasm --cpu list

 --cpu=Cortex-A15
 --cpu=Cortex-A15.no_neon
 --cpu=Cortex-A15.no_neon.no_vfp

>armasm --fpu list

 --fpu=VFPv3
 --fpu=VFPv3_FP16
 --fpu=VFPv3_D16
 --fpu=VFPv3_D16_FP16
 --fpu=VFPv2
 --fpu=VFPv4
 --fpu=VFPv4_D16
 --fpu=FPv4-SP
 --fpu=FPv5_D16
 --fpu=FPv5-SP
 --fpu=SoftVFP
 --fpu=SoftVFP+VFPv2
 --fpu=SoftVFP+VFPv3
 --fpu=SoftVFP+VFPv3_FP16
 --fpu=SoftVFP+VFPv3_D16
 --fpu=SoftVFP+VFPv3_D16_FP16
 --fpu=SoftVFP+VFPv4
 --fpu=SoftVFP+VFPv4_D16
 --fpu=SoftVFP+FPv4-SP
 --fpu=SoftVFP+FPv5_D16
 --fpu=SoftVFP+FPv5-SP
 --fpu=None


In ARM compiler, there is no independent flags to specify the D16/D32 and VFPv3/VFPv4 to make the combinations. Instead, the combinations are clubbed together internally. So, there is no other way than just considering __TARGET_FPU_VFPV4/__TARGET_FPU_VFPV3 as "VFP with D32", unlike IAR EWARM. And, NEON does not come into picture in deciding the context in Kernel or SIMD is used in Kernel library.