ARM Memory Attributes

fm3 mb9bf618t Ethernet driver

The speed should be TTCP -t → 9600 Mbps. TTCP -r → 10000 Mbps. Otherwise, there are some issues. Mainly the MAC_MCR should be immediately after PHY init and must be far from the next MAC register (MAC_MFFR) initialization. As per manual, 2 PHY clock cycle delay should be there after MAC_MCR initialization. Otherwise, in 20 times, there will be few times, when board is started, the Ethernet does not ping.

Unaligned access in memcpy

Do not use memcpy in Device Memory.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka15414.html

Library built with Unaligned access flag.
https://bugs.launchpad.net/gcc-arm-embedded/+bug/1303369

So, no other way except changing the Device memory into Non-cached memory and use sync instructions.

Never set Device memory as Ethernet Buffer. You will be in trouble!

Places to visit

https://blog.weekendthrill.com/top-30-camping-places-around-chennai/

Windows 10 Recovery key

Linux Ethernet drivers for RZ/A1

https://github.com/renesas-rz/linux-3.14/tree/master/drivers/net/ethernet/renesas

sh_eth.c & sh_eth.h are the ethernet drivers for RZ/A1.

Hook routines

When hook routines are enabled, after one hook function call, the execution went to invalid address locations. When the it is disabled, the program works fine. When I changed to SVC mode, then also it was working fine. When analyzing, the stack used was the previous task's stack pointer.

So, when checking a function call, not only check whether the registers are properly saved and returned. But, also check the stack used is not corrupting others. Even when checking a function, check once with changing the stack pointer.