Friday, September 15, 2023

Intel NIOS V Resources


Nios V/m software development


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8. Jumps to alt_main()—The processor jumps to the alt_main() function, which begins initializing the HAL BSP run-time library.

Note: If you use a third-party RTOS or environment for your BSP library file, the alt_main() function can be different than the one provided by Intel.

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The HAL alt_main() function performs the following steps:
 1. Initializes interrupts—Sets up interrupt support for the Nios V processor with the alt_irq_init() function.
 2. Starts MicroC/OS-II—Starts the MicroC/OS-II, if this OS is configured to run (with the ALT_OS_INIT and ALT_SEM_CREATE functions). For additional information about MicroC/OS-II use and initialization, refer to Selecting the Operating System.

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3.4.3.1. Timer Devices The HAL provides two types of timer services, a system clock timer, and a timestamp timer. • The system clock timer is used to control, monitor, and schedule system events. • The timestamp variant is used to make high performance timing measurements. You can assign each of these timer services to the Nios V processor internal timer or an Intel Avalon Timer peripheral. Note: Nios V processor core includes a timer that provides both the system clock timer and timestamp services.

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The HAL system initialization process calls the MicroC/OS-II function OSInit() before
alt_sys_init(), which instantiates and initializes each device in the system.
Therefore, the complete MicroC/OS-II API is available to device drivers, although the
system is still running in single-threaded mode until the program calls OSStart()
from within main().
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C:\intelFPGA_pro\23.2\nios2eds\components\micrium_uc_osii\UCOSII\inc\os


9.3.5. Interrupt Service Routines for MicroC/OS-II
Implementing ISRs for MicroC/OS-II normally involves some housekeeping details, as
described in MicroC/OS-II: The Real-Time Kernel. However, because the Nios V
implementation of MicroC/OS-II is based on the HAL, several of these details are
taken care of for you. The HAL performs the following housekeeping tasks for your
interrupt service routine (ISR):
• Saves and restores processor registers
• Calls OSIntEnter() and OSIntExit()
The HAL also allows you to write your ISR in C, rather than assembly language.


 

Tuesday, July 25, 2023

Math olympiad

 “In terms of Olympiad Math, I am mostly self-taught. Ever since grade 10, I have been doing Olympiad Math, through the Art of Problem Solving website, classes on the Online Math Club and handouts by Evan Chen, a past Olympiad medallist. I won a gold medal and placed 12th overall in this year’s event,” said Atul.

He got a perfect score of 1600 on the SAT last year and he will be continuing my future studies, doing Mathematics and Computer Science at the Massachusetts Institute of Technology, USA. “I am also the director of the Sophie Fellowship, an initiative to prepare Indian students for Math Olympiads by showing them its beauty. With this, I also hope to reach out to more students in India, most of who are unaware of the prospects mathematics holds as a career,” he added.“In terms of Olympiad Math, I am mostly self-taught. Ever since grade 10, I have been doing Olympiad Math, through the Art of Problem Solving website, classes on the Online Math Club and handouts by Evan Chen, a past Olympiad medallist. I won a gold medal and placed 12th overall in this year’s event,” said Atul.

He got a perfect score of 1600 on the SAT last year and he will be continuing my future studies, doing Mathematics and Computer Science at the Massachusetts Institute of Technology, USA. “I am also the director of the Sophie Fellowship, an initiative to prepare Indian students for Math Olympiads by showing them its beauty. With this, I also hope to reach out to more students in India, most of who are unaware of the prospects mathematics holds as a career,” he added.


Wednesday, May 31, 2023

ProSolutions

Problem 1:

When testing sending serial text file through terminal, the serial task id is changed with idle task. I doubted that any interrupt occurs inside the critical section.

Solution: Inside the SVC, interrupt occured. The SVC priority setting was wrong. Instead of higher priority, lowest priority was set. So, interrupt occured inside. Just check any changed done in code.


Problem 2:

When _dispatch? function is step-executed using EWARM in Cortex-M0+ kernel till the end of the function and run, hardfault exception occurs.

Solution: The Cortex-M0+ kernel is using PendSV and the exception does not jump to PendSV_Handler while step-executing even when PendSV request is pending. When you run, the PendSV occurs in unexpected location and the PendSV handler performs the context switch and returns assuming the original location, the register values might have corrupted. So, excetion occurs. Thus, this does not mean the software issue, instead the debugger setting maybe, to allow branching to PendSV handler immediately.

Problem 3:

Abort at the entrance of MainTask in Arm. There are no specific instructions causing them.

Solution: Acutally, in the CPSR, the A flag which Disables the Asynchronous Aborts has delayed the abort exception from the actual location of abort. So, try to Make the A flag to 0 at starting of the program, so that you can find the exact location and cause. In Cortex-A52, the master MPU program needs to be done from CPU0. Since I tried to program it in CPU1, it caused it. But, since inside the kernel, the A flag was 1, it did not occur there. Once entered MainTask with A flag 0, it caused exception.

Problem 4:
I was trying to FPGA program the Agilex 7 F series evaluation board. But, it failed.

Solution: Installed the Agilex 7 device support. After that I could program the FPGA using the board test software (BTS) provided .sof files. But, not my own .sof. Because when looking at the design provided by FPGA design store, it was for another board of same Agilex 7 F device. Look carefully at the board type.

Problem 5:
When debugging Nios V, the exeuction goes to Enviornment call easily, though there is no interrupt enabled at that point.

Solution: Do not doubt the interrupt. That means it is exception. Please check mepc register to know about from where the exception occurred.