EVMK2G

Software:

http://www.tij.co.jp/tool/jp/processor-sdk-k2g

Wiki:
http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup

ARM Cortex-A15
http://processors.wiki.ti.com/index.php/Processor_SDK_Bare_Metal_Examples

About using TI compiler for Cortex-A15

https://e2e.ti.com/support/development_tools/compiler/f/343/t/382886

https://e2e.ti.com/support/development_tools/compiler/f/343/t/599102

Timer interrupt occurs only in non-secure mode

The CPU may be in insecure mode. Please look at SCR.NS bit.

MRC p15, 0, <Rt>, c1, c1, 0; Read Secure Configuration Register data
MCR p15, 0, <Rt>, c1, c1, 0; Write Secure Configuration Register data

The initialization script file had changed the CPU to non-secure mode. Also, the GIC had been configured (IGROUP registers) to interrupt only in non-secure mode.

66AK2G UART0 Interrupt does not occur in ARM core

UART0 interrupt needs to be configured as edge.

Ethernet subsystem
https://lxr.missinglinkelectronics.com/uboot/arch/arm/mach-keystone/include/mach/hardware-k2g.h#L69

https://lxr.missinglinkelectronics.com/linux/drivers/net/ethernet/ti/netcp_ethss.c

http://processors.wiki.ti.com/index.php/Linux_Core_NetCP_User%27s_Guide

U-Boot
https://lxr.missinglinkelectronics.com/uboot/drivers/dma/keystone_nav.c#L50
https://lxr.missinglinkelectronics.com/uboot/drivers/net/keystone_net.c#L503
https://lxr.missinglinkelectronics.com/uboot/include/configs/k2g_evm.h#L84
https://github.com/RobertCNelson/u-boot/blob/master/board/ti/ks2_evm/mux-k2g.h
https://lxr.missinglinkelectronics.com/uboot/board/ti/ks2_evm/board_k2g.c

KeyStone Architecture Multicore Navigator
http://www.ti.com/lit/ug/sprugr9h/sprugr9h.pdf
http://processors.wiki.ti.com/images/f/f0/Eindhoven_JAN_12-06_MulticoreNavigator.pdf

Multicast
http://processors.wiki.ti.com/index.php/Linux_Core_CPSW_User's_Guide

Cache Invalidate Issue:
http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/sysbios/6_42_03_35/exports/bios_6_42_03_35/docs/cdoc/ti/sysbios/family/arm/a15/Cache.html
https://elixir.free-electrons.com/linux/latest/source/arch/arm/mm/proc-v7.S
https://e2e.ti.com/support/embedded/tirtos/f/355/t/544363

reload fails when cache is enabled Cortex-a15
https://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/619005

https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/341333
http://processors.wiki.ti.com/index.php/Debugging_Cortex_A15
https://lists.denx.de/pipermail/u-boot/2012-November/139029.html

U-Boot standalone application - Cache consideration
https://www.denx.de/wiki/view/DULG/UBootStandalone

NEON Test
http://processors.wiki.ti.com/index.php/Cortex-A8#How_to_enable_NEON
-o3 -mv7a8 --neon -mf (--opt_for_speed=5) "

Fused Multiply-Add extension(VFPv4)
http://www.keil.com/support/man/docs/armclang_asm/armclang_asm_pge1427897626943.htm
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473f/CIHJEBCE.html
        fmadd   d1, d2, d3, d4          ; Double-precision

Generic Timer
https://github.com/freebsd/freebsd/blob/master/sys/arm/arm/generic_timer.c