The perfect devices: November 2016

Sunday, November 27, 2016

http://lxr.free-electrons.com/source/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
http://lxr.free-electrons.com/source/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c#L20

Half-Duplex Mode: When this bit is 1, the transmitter operates in
half-duplex mode. When this bit is 0, the transmitter operates in
full-duplex mode. Only full-duplex is supported so this bit should
always be set to 0.

There is basically difference between Marvell 88E1111S and 88E1011S. But, lanphy.c has 88E1011S settings for 88E1111S. Refer to the following:
https://github.com/Xilinx/u-boot-xlnx/blob/master/drivers/net/phy/marvell.c

88E1111S Vs 88E1116R
http://svn.dd-wrt.com/browser/src/linux/universal/linux-3.12/drivers/net/phy/marvell.c?rev=22733

#define __GNUC__ 5

#define __GNUC_MINOR__ 2

#define __GNUC_PATCHLEVEL__ 0

For example,

GCC assembler comments style differs based on architecture. For PowerPC and MicroBlaze, it is #. For ARM, it is @.

SDK version GCC version
SDK 2019.1   8.2
SDK 2018.3   7.3
SDK 2018.2   7.2
SDK 2018.1   7.2
SDK 2017.4 6.2
SDK 2017.3 6.2
SDK 2016.4 5.2
SDK 2016.3 5.2
SDK 2016.1 5.2 (Upgraded to)
SDK 2015.4 4.9.2
SDK 2015.3 4.9.2
SDK 2015.1 4.9.2 (Upgraded to)
SDK 2014.1 4.8.3 (Upgraded to)
SDK 14.5/2013.1
EDK14.1 4.6.2

https://www.xilinx.com/support/answers/55776.html

GCC version comparison

https://sourceforge.net/p/stxxl/git/ci/61b7fe42d2ff7ae5157049b720793c380450c6c2/tree/include/stxxl/bits/compat/shared_ptr.h?barediff=e95b9e0556953f21f002d9128de5becbba68b98e

https://gcc.gnu.org/onlinedocs/gcc-4.0.2/cpp/Common-Predefined-Macros.html

Fast Simplex Link (FSL) Interface Description
The Fast Simplex Link bus provides a point-to-point communication channel between an output FIFO and an input FIFO.

Interrupt Level Control By Software

http://google.co.kr/patents/US20050193260

Start lmtool in Vaio of your user name/download

Assign the IP/8224 in the license manager of DS-5.