Sunday, March 27, 2016
Saturday, March 26, 2016
Saturday, March 19, 2016
EWARM STACK placement and linker defined symbols
Are We Shooting Ourselves in the Foot with Stack Overflow?
http://embeddedgurus.com/state-space/2014/02/are-we-shooting-ourselves-in-the-foot-with-stack-overflow/Tuesday, March 8, 2016
Vectorization
http://www.doulos.com/knowhow/arm/using_your_c_compiler_to_exploit_neon/Resources/using_your_c_compiler_to_exploit_neon.pdf
Using IAR Embedded Workbench for ARM compiler vectorization ..
https://www.iar.com/support/resources/articles/automatic-neon-vectorization/
https://www.google.co.jp/?gfe_rd=cr&ei=Tv7wVqHIGKzU8Afv0oHADg#q=gcc+howto+use+pragma+to+disable+vectorization
(How to user pragma to disable vectorization)
http://stackoverflow.com/questions/7778174/how-can-i-disable-vectorization-while-using-gcc
C:\Program Files (x86)\KPIT\GNUARM-NONEv15.01-EABI\Doc\optimization_in_GCC.html
For ARM CC
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0472j/chr1359124210006.html
List of options - Keil
http://www.keil.com/support/man/docs/armcc/armcc_chr1359124992544.htm
http://www.slideshare.net/linaroorg/using-gcc-autovectorizer
novector GCC
http://www.isus.jp/article/compileroptimization/compiler_part6/
Branch Prediction - Cortex-A initialization
https://chromium.googlesource.com/native_client/nacl-newlib/+/99fc6c167467b41466ec90e8260e9c49cbe3d13c/libgloss/arm/cpu-init/rdimon-aem.S
Using IAR Embedded Workbench for ARM compiler vectorization ..
https://www.iar.com/support/resources/articles/automatic-neon-vectorization/
https://www.google.co.jp/?gfe_rd=cr&ei=Tv7wVqHIGKzU8Afv0oHADg#q=gcc+howto+use+pragma+to+disable+vectorization
(How to user pragma to disable vectorization)
http://stackoverflow.com/questions/7778174/how-can-i-disable-vectorization-while-using-gcc
C:\Program Files (x86)\KPIT\GNUARM-NONEv15.01-EABI\Doc\optimization_in_GCC.html
For ARM CC
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0472j/chr1359124210006.html
List of options - Keil
http://www.keil.com/support/man/docs/armcc/armcc_chr1359124992544.htm
http://www.slideshare.net/linaroorg/using-gcc-autovectorizer
novector GCC
http://www.isus.jp/article/compileroptimization/compiler_part6/
Branch Prediction - Cortex-A initialization
https://chromium.googlesource.com/native_client/nacl-newlib/+/99fc6c167467b41466ec90e8260e9c49cbe3d13c/libgloss/arm/cpu-init/rdimon-aem.S
Thursday, March 3, 2016
ARM ADS
This option instructs the compiler to generate raw listing information for a source file. The name of the raw listing file defaults to the name of the input file with the filename extension
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/CHDDIBFD.html
GENMAI sample
http://japan.renesas.com/products/mpumcu/rz/rza/rza1h/Application_Notes.jsp
LDR (PC relative)
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Babcjaii.html
http://www.sciencezero.org/index.php?title=ARM:_Cortex-M3_Thumb-2_instruction_set
Section placement and Scatter loading in ARM
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065968963.htm
Load$$LR$$ load region symbols
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065953823.htm
Loading linker symbol
http://infocenter.arm.com/help/topic/com.arm.doc.dui0474l/DUI0474L_armlink_user_guide.pdf
32-bit applications
Create a 32-bit data word to hold the value of the symbol, for example:
IMPORT |Image$$ZI$$Limit|
…
zi_limit DCD |Image$$ZI$$Limit|
To load the value into a register, such as r1, use the LDR instruction:
LDR r1, zi_limit
The LDR instruction must be able to reach the 32-bit data word. The accessible memory range varies
between ARM and Thumb, and the architecture you are using.
.lst
.http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/CHDDIBFD.html
GENMAI sample
http://japan.renesas.com/products/mpumcu/rz/rza/rza1h/Application_Notes.jsp
LDR (PC relative)
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Babcjaii.html
http://www.sciencezero.org/index.php?title=ARM:_Cortex-M3_Thumb-2_instruction_set
Section placement and Scatter loading in ARM
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065968963.htm
Load$$LR$$ load region symbols
http://www.keil.com/support/man/docs/armlink/armlink_pge1362065953823.htm
Loading linker symbol
http://infocenter.arm.com/help/topic/com.arm.doc.dui0474l/DUI0474L_armlink_user_guide.pdf
32-bit applications
Create a 32-bit data word to hold the value of the symbol, for example:
IMPORT |Image$$ZI$$Limit|
…
zi_limit DCD |Image$$ZI$$Limit|
To load the value into a register, such as r1, use the LDR instruction:
LDR r1, zi_limit
The LDR instruction must be able to reach the 32-bit data word. The accessible memory range varies
between ARM and Thumb, and the architecture you are using.
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