Cortex-M3/M4 preassumptions

ISR:


push {lr}
bl ent_int
bl isr
pop {lr}
b ret_int


ent_int:


tcb->sp should point to the t_ctx structure so that inside interrupt handler the system calls can refer tcb->sp->wid and tcb->sp->ercd etc.


https://github.com/DISTORTEC/distortos/blob/master/source/architecture/ARM/ARMv7-M/ARMv7-M-PendSV_Handler.cpp


http://stackoverflow.com/questions/25199802/switching-context-inside-an-isr-on-cortex-m